Considerable interest has been shown recently in porous semiconductors because of their good properties for use in sensors and electroluminescent devices. Silicon is currently the technologically most important semiconductor material. However, applications in semiconductor photonics seemed unlikely due to its indirect electronic band gap. The discovery of electrochemically formed visible light emitting porous Si has, in the past few years, stimulated intense and increasing research activity. The main reason for this tremendous interest is the prospect of light emitting devices made of porous Si.
Prior approaches to producing porous Si patterns mostly use photolithographic techniques. The fabrication of porous semiconductors, for example, of silicon or GaAs, requires a lithography/microfabrication process to create nano- or micro-structures on semiconductor wafers. Examples of papers which describe such structures and techniques for their fabrication: "Doping-induced selective area photoluminesence in porous silicon", A. J. Steckl, J. Xu, H. C. Mogul and S. Mogren, Applied Physics Letters, 62 (16) 1982 (1993); "Fabrication of visibly photoluminescent Si microstructures by focused ion beam implantation and wet etching", J. Xu and A. J. Steckl Applied Physics Letters 65, 2081 (1994); "Enhancement and suppression of the formation of porous silicon", S. P. Dattagupta, C. Peng, P. M. Fauchet, S. K. Kurinec, and T. N. Blanton, Journal of Vacuum Science and Technology B 13, 1230 (1995); "Ion-irradiation control of photoluminescence from porous silicon", J. C. Barbour, D. Dimos, T. R. Guilinger, M. J. Kelly, and S. S. Tsao, Applied Physics Letters 59, 2088 (1991); and "Silicon-based visible light emitting devices integrated into microelectronic circuits", K. D. Hirschmann, L. Tsybeskov, S. P. Dattagupta, and P. M. Fauchet, Nature (London) 384, 338 (1996).
Large area porous surfaces on semiconductor substrates are typically produced in two ways, both of which use a wet etch process. One method uses an electrochemical process in which a small electric current is passed through an electrolyte to the substrate to etch the sample. A second method uses a stain etch to accomplish the same end with no externally applied electric current. The entire exposed area of the substrate is etched.
The creation of nano- or micro-patterned porous semiconductors requires some technique for restricting the etch process to areas within the nano- or micro-pattern and inhibiting the process elsewhere. Several methods have been proposed to restrict the etch process to the micropatterned areas.
In one technique, an electrochemical resistant mask, which allows the electrolyte to reach the semiconductor surface only in areas where a porous surface is required, is bonded onto the substrate. The disadvantage of this method is that one must apply an electrochemical resistant layer (such as Si.sub.3 N.sub.4) to the substrate, pattern it using photolithography, etch the pattern through the electrochemical resistant layer without etching the substrate, electrochemically etch to produce the porous surface, and then remove the electrochemical resistant layer. This is an unduly complex process. The smallest structures that can be created are limited by the resolution of the photolithography/microfabrication of the chemical resistant layer.
In another technique, the substrate is amorphized (i.e. the crystal structure is destroyed) by implanting ions at a high dose in areas where a porous surface is not desired. Amorphizing the sample requires a large dose of ions which affect the electrical characteristics of the material. Since the amorphization is required everywhere where a porous surface is not desired, and since the other areas may be used for electrical functions, this process can leave the semiconductor in a state unsuitable for use in a device. The implanted ions are impurities in the sample. In addition, after amorphization, a high temperature anneal is required to regrow the crystal structure. Since impurities in the semiconductor migrate during this heating process, the total anneal time is limited for the completed device (thermal budget). This one step alone will use a substantial part of this limited anneal time.
Photo-assisted electrochemistry can be employed wherein the sample is illuminated through an optical mask while the surface is etched electrochemically. The resolution of the photo-assisted electro-chemical process has both a photolithography (diffraction) limit and a limit imposed by the lifetime of the optical carriers as they migrate from the illuminated region into the dark region. These optical carriers are necessary for etching, so the etched boundary will be diffuse (or smeared).
The surface can be ion milled (dry etched) in areas where a porous surface is required. The electrochemical etching process is enhanced in areas which have been ion milled. The ion milled surface etches faster than the non-ion milled surface. So the surface is etched everywhere. This process is not totally selective. Another drawback is that the ion milling produces a shallow trench.
Alternatively, advantage can be taken of the fact that the incubation time for pore formation is strongly dependent on the impurity concentration (doping) of the substrate. By locally doping the wafer and then annealing the substrate, micropatterned porous silicon has been produced by stain etching under illumination. If the incubation time of the neighboring areas exceeds the total etch time in the implanted areas, a totally selective etch process is achieved. If there is no annealing, the process is a partially selective negative process similar to the amorphization process described above.
This latter process is totally selective only if the incubation time contrast between implanted regions and the non-implanted regions is greater than the total etch time required in the implanted regions. If not, a porous surface is produced everywhere, with significantly enhanced etching in the implanted regions. Dopant ions are used which modify the electrical characteristics of the substrate (but only in the neighborhood of the porous Si areas). A thermal treatment is required using some of the thermal budget.
An object of the invention is to alleviate the disadvantages of the prior art.